September 28th 2004

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Transistors September 28 th 2004 Student Lecture by: Giangiacomo Groppi Joel Cassell Pierre Berthelot

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Lecture plot Historical presentation Semiconductor gadgets review Bipolar Junction Transistor (BJT) Field Effect Transistors (FET) Power Transistors

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Transistor History Invention : 1947 ,at Bell Laboratories. John Bardeen , Walter Brattain , and William Schockly built up the primary model of transistor (a Three Points transistor, made with Germanium ) They got Nobel Prize in Physics in 1956 "for their investigates on semiconductors and their revelation of the transistor effect" First application: supplanting vacuum tubes (huge & wasteful). Today: a great many Transistors are based on a solitary silicon wafer in most regular electronic gadgets First model of Transistor

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What is a transistor ? The Transistor is a three-terminal, semiconductor gadget . It's conceivable to control electric current or voltage between two of the terminals ( by applying an electric current or voltage to the third terminal ). The transistor is a dynamic segment. With the Transistor we can make enhancement gadgets or electric switch . Setup of circuit figures out if the transistor will function as switch or intensifier As a smaller than usual electronic switch, it has two working positions: on and off. This exchanging capacity permits twofold usefulness and licenses to process data in a chip.

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Semiconductors Most utilized semiconductor: Silicon Basic building material of most coordinated circuits Has four valence electrons, in its cross section there are 4 covalent bonds. Silicon precious stone itself is a protector: no free electrons Intrinsic focus (n i ) of charge bearers: capacity of Temperature (at room temp. 300K n i = 10/cm 3 )

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Semiconductors 2 Electric conductibility in the Silicon precious stone is expanded by rising the temperature (not helpful for our degree) and by doping . Doping comprises in including little measures of neighbor components.

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N-sort P-sort Semiconductors 3: Doping Two Dopant Types N-sort (Negative) Donor debasements (from Group V) added to the Si gem cross section. Predominant versatile charge transporter: negative electrons . Aggregate V components, for example, Phosphorous, Arsenic, and Antimony. P-sort (Positive) Acceptor contaminations (from Group III) added to the Si precious stone grid. Predominant portable charge bearer: positive openings . Assemble III components, for example, Boron, Aluminum, and Gallium.

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The easiest case: p-n intersection It's additionally called Junction Diode Allows current to spill out of P to N as it were. As a result of the thickness angle , electrons diffuse to the p district, openings to the n area. As a result of the recombination , the area close to the intersection is drained of portable charges. Two sorts of conduct: Forward and Reverse one-sided.

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Forward inclination Forward biasing: The outside Voltage brings down the potential obstruction at the intersection. The p-n intersection drives openings (from the p - sort material) and electrons (from the n - sort material) to the intersection. A current of electrons to one side and a current of openings to the privilege : the aggregate current is the total of these two streams.

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Reverse predisposition Reverse biasing: Reverse voltage expands the potential obstruction at the intersection. There will be a transient current to stream as both electrons and openings are pulled far from the intersection. At the point when the potential framed by the augmented consumption area breaks even with the connected voltage, the present will stop aside from the little warm current . It's called turn around immersion current and is because of gap electrons sets produced by warm vitality.

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V limit Diode attributes Forward one-sided (on)- Current streams It needs around 0.7 V to begin conduction (V d ) Reversed one-sided (off)- Diode pieces current Ideal: Current stream = 0 Real : I stream = 10 - 6 Amps (invert immersion current)

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BJT

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npn bipolar intersection transistor pnp bipolar intersection transistor Bipolar Junction Transistor (BJT) 3 adjoining areas of doped Si ( each associated with a lead ): Base. (thin layer,less doped). Gatherer. Emitter. 2 sorts of BJT: npn. pnp. Most basic : npn (concentrate on it). Created by Shockley (1949)

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BJT npn Transistor 1 thin layer of p-sort , sandwiched between 2 layers of n-sort . N-kind of emitter: more vigorously doped than gatherer. With V C >V B >V E : Base-Emitter intersection forward one-sided , Base-Collector invert one-sided . Electrons diffuse from Emitter to Base (from n to p). There's a consumption layer on the Base-Collector intersection �� no stream of e - permitted. In any case, the Base is thin and Emitter area is n + (intensely doped) ��  electrons have enough energy to cross the Base into the Collector. The little base current I B controls an expansive current I C

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BJT attributes Current Gain: α is the division of electrons that diffuse over the limited Base district 1-α is the portion of electrons that recombine with gaps in the Base area to make base current The present Gain is communicated as far as the β (beta) of the transistor (regularly called h fe by producers). β (beta) is Temperature and Voltage subordinate. It can change a ton among transistors (normal qualities for flag BJT: 20 - 200).

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npn Common Emitter circuit Emitter is grounded. Base-Emitter begins to direct with V BE =0.6V,I C streams and it's I C = b* I B . Expanding I B , V BE gradually increments to 0.7V yet I C rises exponentially. As I C rises ,voltage drop crosswise over R C increments and V CE drops toward ground. (transistor in immersion, not any more straight connection between I C and I B )

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Common Emitter qualities Collector current controlled by the authority circuit. ( Switch conduct ) In full immersion V CE =0.2V. Gatherer current corresponding to Base current The torrential slide augmentation of current through authority intersection happens: to be dodged No present streams

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BJT as Switch V in (Low ) < 0.7 V BE intersection not forward one-sided Cutoff area No present streams V out = V CE = V cc V out = High V in (High) BE intersection forward one-sided (V BE =0.7V) Saturation district V CE little (~0.2 V for immersed BJT) V out = little I B = (V in - V B )/R B V out = Low

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BJT as Switch 2 Basis of computerized rationale circuits Input to transistor entryway can be simple or advanced Building obstructs for TTL – Transistor Logic Guidelines for outlining a transistor switch: V C >V B >V E V BE = 0.7 V I C free from I B (in immersion). Min. I B evaluated from by (I Bmin » I C/b ). Input resistance ��  to such an extent that I B > 5-10 times I Bmin on the grounds that b fluctuates among parts, with temperature and voltage and R B may change when current streams. Ascertain the maximum I C and I B not to conquer gadget particulars.

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Operation purpose of BJT Every I B has a comparing I-V bend. Selecting I B and V CE , we can locate the working point, or Q point. Applying Kirchoff laws around the base-emitter and authority circuits, we have : I B = (V BB - V BE )/R B V CE = V cc – I C *R C

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Operation purpose of BJT 2 Load-line bend Q

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BJT as enhancer Common emitter mode Linear Active Region Significant current Gain Example: Let Gain, b = 100 Assume to be in dynamic locale - > V BE =0.7V Find if it's in dynamic area

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BJT as speaker 2 V CB >0 so the BJT is in dynamic district

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Operation district rundown

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FET

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Field Effect Transistors Similar to the BJT: Three terminals, Control the yield current 1955 : the main Field impact transistor works Increasingly imperative in mechatronics.

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Field Effect Transistors Three Types of Field Effect Transistors MOSFET (metal-oxide-semiconductor field-impact transistors) Enhancement mode Depletion mode JFET (Junction Field-impact transistors) Each in p-channel or n-channel The more utilized one is the n-channel upgrade mode MOSFET, likewise called NMOS

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Depletion mode Enhancement mode Symbols (base associated with the source or not) MOSFET (improvement mode n-channel) The arrow point shows the heading of the pn substrate-channel intersection N-channel => Source and Drain are n sort Enhancement mode => Increase V GS to make the go from D to S less demanding for the electrons

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NMOS Behavior V GS < V th I DS =0 V GS > V th : 0 < V DS < V Pinch off Depletion mode (or dynamic area), door openings are repulsed.  variable resistor (controled by VGS ) V DS > V Pinch off Inversion mode (or immersion area), IDS steady. V DS > V Breakdown IDS builds rapidly Should be kept away from

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For V DS > V Pinchoff , the base current is an element of V GS Active area Saturation district Pinchoff Point NMOS Characteristic

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NMOS Vs PMOS Symbols:

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NMOS Vs PMOS V GS > V th V th < 0 I DS =0 V GS < V th : 0 < V DS < V Pinch off Depletion mode (or dynamic locale), door openings are repulsed.  variable resistor (controled by VGS ) V DS > V Pinch off Inversion mode (or immersion district), IDS steady. Closely resembling the pnp BJT V DS > V Breakdown IDS expands rapidly Should be maintained a strategic distance from

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NMOS utilizes High-current voltage-controlled switches Analog switches Drive DC and stepper engine Current sources Chips and Microprocessors CMOS: Complementary creation

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For V pinchoff < V DS < 0 And V GS > V TH NMOS Example

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The circuit images: JFET outline: JFET review

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JFET Behavior Can be utilized with V G =0 .:ts

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