Semiconductor Devices

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Power. Power is the stream of electronsGood transmitters (copper) have effortlessly discharged electrons that float inside of the metalUnder impact of electric field, electrons stream in a currentmagnitude of current relies on upon extent of voltage connected to circuit, and the resistance in the way of the circuitCurrent stream represented by Ohm\'s Law.

Presentation Transcript

Slide 1

´╗┐Semiconductor Devices Atoms and power Semiconductor structure Conduction in semiconductors Doping epitaxy dissemination particle implantation Transistors MOS CMOS Implementing rationale capacities

Slide 2

Electricity is the stream of electrons Good directors (copper) have effectively discharged electrons that float inside the metal Under impact of electric field, electrons stream in a present size of current relies on upon greatness of voltage connected to circuit, and the resistance in the way of the circuit Current stream administered by Ohm's Law V = IR + electron stream course -

Slide 3

Electron Bands Electrons hover core in characterized shells K 2 electrons L 8 electrons M 18 electrons N 32 electrons Within each shell, electrons are further gathered into subshells s 2 electrons p 6 electrons d 10 electrons f 14 electrons are doled out to shells and subshells from back to front Si has 14 electrons: 2 K, 8 L, 4 M L K M shell d p s 10 6 2

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Semiconductor Crystalline Structure Semiconductors have a customary crystalline structure for monocrystal, reaches out through whole structure for polycrystal, structure is hindered at sporadic limits Monocrystal has uniform 3-dimensional structure Atoms possess settled positions in respect to each other, yet are in consistent vibration about balance

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Semiconductor Crystalline Structure Silicon molecules have 4 electrons in external shell inward electrons are firmly bound to iota These electrons are imparted to neighbor iotas on both sides to "fill" the shell coming about structure is exceptionally steady electrons are decently firmly bound no "free" electrons at room temperature, if battery connected, almost no electric current streams

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Conduction in Crystal Lattices Semiconductors (Si and Ge) have 4 electrons in their external shell 2 in the s subshell 2 in the p subshell As the separation between particles diminishes the discrete subshells spread out into groups As the separation diminishes promote, the groups cover and afterward isolate the subshell demonstrate doesn't hold any longer, and the electrons can be considered as being a piece of the precious stone, not some portion of the particle 4 conceivable electrons in the lower band ( valence band ) 4 conceivable electrons in the upper band ( conduction band )

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Energy Bands in Semiconductors The space between the groups is the vitality crevice , or taboo band

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Insulators, Semiconductors, and Metals This partition of the valence and conduction groups decides the electrical properties of the material Insulators have a substantial vitality hole electrons can't hop from valence to conduction groups no present streams Conductors (metals) have a little (or nonexistent) vitality hole electrons effortlessly bounce to conduction groups because of warm excitation current streams effectively Semiconductors have a direct vitality hole just a couple of electrons can hop to the conduction band leaving " openings " just somewhat current can stream

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Insulators, Semiconductors, and Metals (proceeded with) Conduction Band Valence Band Conductor Semiconductor Insulator

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Hole - Electron Pairs Sometimes warm vitality is sufficient to bring about an electron to hop from the valence band to the conduction band delivers a gap - electron match Electrons likewise "fall" pull out of the conduction band into the valence band, consolidating with a gap combine disposal match creation gap electron

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Improving Conduction by Doping To improve semiconductors directors, include debasements (dopants) to contribute additional electrons or additional gaps components with 5 external electrons contribute an additional electron to the cross section ( benefactor dopant) components with 3 external electrons acknowledge an electron from the silicon ( acceptor dopant)

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Improving Conduction by Doping (cont.) Phosphorus and arsenic are giver dopants if phosphorus is brought into the silicon grid, there is an additional electron "free" to move around and add to electric current approximately bound to molecule and can without much of a stretch hop to conduction band produces n sort silicon once in a while utilize + image to show heavier doping, so n+ silicon phosphorus gets to be distinctly positive particle in the wake of surrendering electron

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Improving Conduction by Doping (cont.) Boron has 3 electrons in its external shell, so it contributes a gap in the event that it dislodges a silicon molecule boron is an acceptor dopant yields p sort silicon boron gets to be distinctly negative particle in the wake of tolerating an electron

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Epitaxial Growth of Silicon Epitaxy develops silicon on top of existing silicon utilizes synthetic vapor testimony new silicon has same gem structure as unique Silicon is put in load at high temperature 1200 o C (2150 o F) Appropriate gasses are bolstered into the load different gasses add pollutions to the blend Can develop n sort, then change to p sort rapidly

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Diffusion of Dopants It is likewise conceivable to bring dopants into silicon by warming them so they diffuse into the silicon no new silicon is included high warmth causes dispersion Can be finished with steady fixation in environment near straight line focus angle Or with steady number of molecules per unit territory predeposition ringer formed inclination Diffusion causes spreading of doped zones best side

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Diffusion of Dopants (proceeded with) Concentration of dopant in encompassing climate kept consistent per unit volume Dopant stored on surface - consistent sum per unit range

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Ion Implantation of Dopants One approach to lessen the spreading found with dispersion is to utilize particle implantation additionally gives better consistency of dopant yields speedier gadgets bring down temperature prepare Ions are quickened from 5 Kev to 10 Mev and coordinated at silicon higher vitality gives more prominent profundity entrance add up to dosage is measured by flux number of particles per cm 2 regularly 10 12 for every cm 2 - 10 16 for every cm 2 Flux is over whole surface of silicon utilize covers to cover territories where implantation is not needed Heat a short time later to work into gem grid

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Hole and Electron Concentrations To deliver sensible levels of conduction doesn't require much doping silicon has around 5 x 10 22 molecules/cm 3 normal dopant levels are around 10 15 molecules/cm 3 In undoped (inborn) silicon, the quantity of gaps and number of free electrons is equivalent, and their item meets a steady really, n i increments with expanding temperature This condition remains constant for doped silicon too, so expanding the quantity of free electrons diminishes the quantity of gaps np = n i 2

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Metal-Oxide-Semiconductor Transistors Most present day computerized gadgets utilize MOS transistors, which have two focal points over different sorts more noteworthy thickness less complex geometry, henceforth less demanding to do MOS transistors switch on/off more gradually MOS transistors comprise of source and deplete disseminations, with an entryway that controls whether the transistor is on Gate S D metal n+ silicon dioxide p monosilicon

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+ S D + n+ p - MOS Transistors (kept) Making door positive (for n channel gadget) causes current to spill out of source to deplete draws in electrons to door region, makes conductive way For given entryway voltage, expanding voltage contrast amongst source and empty expands current out of source to deplete

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Complementary MOS Transistors A variation of MOS transistor utilizes both n-channel and p-channel gadgets to make the essential building obstruct (an inverter , or not door) bring down power utilization symmetry of outline If in = +, n-channel gadget is on, p-divert is off, out is associated with - If in = - , n-divert is off, p-channel is on, out is associated with + No present moves through battery in either case!! P out in N

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CMOS (proceeded with) CMOS geometry (and assembling procedure) is more confounded Lower control utilization balances that Bi-CMOS joins CMOS and bipolar (another transistor sort) on one chip CMOS for rationale circuits Bi-polar to drive bigger electrical circuits off the chip S D S D n+ p+ n p

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Logic Functions Using CMOS p A p B out two info NAND - if both sources of info 1, both p-direct are off, both n-channel are on, out is negative; generally no less than one p-channel is on and one n-divert off, and out is sure n input 0 input 1

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