PC Design

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Discover the quickest/least expensive/power-productive/and so forth arrangement. Enhancement issue with 100s of ... Autos go at 44,000 mph and get 16,000 mpg. Air travel: LA to NY in ...

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Slide 1

PC Architecture Instruction Set Architecture (IBM 360) … the qualities of a [computing] framework as observed by the developer. I.e. the theoretical structure and practical conduct, as particular from the association of the information streams and controls, the rationale outline, and the physical usage. - Amdahl, Blaaw, & Brooks, 1964 Machine Organization (microarchitecture) ALUS, Busses, Caches, Memories, and so on. Machine Implementation (acknowledgment) Gates, cells, transistors, wires

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Computer Architecture Exercise in designing tradeoff examination Find the speediest/least expensive/control effective/and so on arrangement Optimization issue with 100s of factors All the factors are changing At non-uniform rates With affectation focuses Only one assurance: Today's correct answer will not be right tomorrow Two abnormal state impacts: Technology push Application Pull

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Technology Push What do these two interims have in like manner? 1776-1999 (224 years) 2000-2001 (2 years) Answer: Equal advance in processor speed! The force of exponential development! Driven by Moore's Law Device per chips pairs each 18-24 months Computer designers work to transform the extra assets into speed/control reserve funds/usefulness!

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Some History

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Performance Growth Unmatched by some other industry ! [John Crawford, Intel] Doubling at regular intervals (1982-1996): 800x Cars go at 44,000 mph and get 16,000 mpg Air travel: LA to NY in 22 seconds (MACH 800) Wheat yield: 80,000 bushels for every section of land Doubling at regular intervals (1971-1996): 9,000x Cars go at 600,000 mph, get 150,000 mpg Air travel: LA to NY in 2 seconds (MACH 9,000) Wheat yield: 900,000 bushels for each section of land

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Technology Push Technology progresses at different rates E.g. Measure limit increments at 60%/year But DRAM speed just enhances 10%/year Creates crevice with processor recurrence! Enunciation focuses Crossover causes quick change E.g. enough gadgets for single-chip processor Imminent: framework on a chip (SOC) and chip multiprocessors (CMP) Imminent: clock flag can't achieve whole chip

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Application Pull Corollary to Moore's Law: Cost parts at regular intervals In 10 years you can purchase a PC for not as much as its business assess today. –Jim Gray Computers savvy for National security – weapons plan Enterprise registering – managing an account Departmental processing – PC supported outline Personal PC – spreadsheets, email, web Pervasive figuring – physician recommended medicate names

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Application Pull What about what's to come? E.g. climate determining computational request Must cook up applications that are not financially savvy today Virtual reality Telepresence Mass customization Web operators Wireless Proactive (past intuitive) w/sensors This is your employment!

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Abstraction Difference amongst interface and usage Interface: WHAT something does Implementation: HOW it does as such

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X Y Mux S F Abstraction, E.g. 2:1 Mux (352) Interface Implementations Gates (quick or moderate), pass transistors

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What's the Big Deal? Tower of deliberation Complex interfaces executed by layers beneath Abstraction conceals detail Hundreds of designers assemble one item Complexity unmanageable something else

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Basic Division of Hardware In space (versus time) Memory Control Output Data way Input Processor

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Basic Division of Hardware In time (versus space) Fetch guideline from memory add r1, r2, r3 Decode the direction – what does this mean? Perused input operands read r2, r3 Perform operation add Write results write to r1 Determine the following instruction pc := pc + 4

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Classes of Computers Supercomputer $5-20 million Mainframe $0.5-4 million Server $10-200 thousand PC/Workstation $1-10 thousand Game console $300-$1000 Embedded device $1-$100 Future disposable 1-100 pennies

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Building Computer Chips Complex multi-step prepare Slice ingots into wafers Process wafers into designed wafers Dice designed wafers into kicks the bucket Test bites the dust, select great bites the dust Bond to bundle Test parts Ship to clients and profit

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Building Computer Chips

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Performance versus Outline Time to market is basically essential E.g., another plan may take 3 years It will be 3 times speedier But in the event that innovation enhances half/year In 3 years 1.5 3 = 3.38 So the new outline is more terrible! (unless it likewise utilizes new innovation)

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Bottom Line Designers must know BOTH programming and equipment Both add to layers of deliberation IC expenses and execution Compilers and Operating Systems

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